<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Mpu-Usage-Patterns on Jesus Oseguera</title><link>https://r0tbyt3.dev/tags/mpu-usage-patterns/</link><description>Recent content in Mpu-Usage-Patterns on Jesus Oseguera</description><generator>Hugo</generator><language>en-us</language><atom:link href="https://r0tbyt3.dev/tags/mpu-usage-patterns/index.xml" rel="self" type="application/rss+xml"/><item><title>MPU Usage Patterns</title><link>https://r0tbyt3.dev/wiki/content/embedded-systems/architectures/arm-m-profile/mpu-usage-patterns/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://r0tbyt3.dev/wiki/content/embedded-systems/architectures/arm-m-profile/mpu-usage-patterns/</guid><description>MPU Usage Patterns MPU Usage Patterns - common configurations of the Cortex-M Memory Protection Unit to enforce privilege separation, protect stack regions, and prevent unauthorized memory access.
Related Links: Boot Flow on Cortex-M Exceptions Interruptions NVIC TrustZone-M</description></item></channel></rss>