<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Nvic on Jesus Oseguera</title><link>https://r0tbyt3.dev/tags/nvic/</link><description>Recent content in Nvic on Jesus Oseguera</description><generator>Hugo</generator><language>en-us</language><atom:link href="https://r0tbyt3.dev/tags/nvic/index.xml" rel="self" type="application/rss+xml"/><item><title>NVIC</title><link>https://r0tbyt3.dev/wiki/content/embedded-systems/architectures/arm-m-profile/nvic/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://r0tbyt3.dev/wiki/content/embedded-systems/architectures/arm-m-profile/nvic/</guid><description>NVIC NVIC - the Nested Vectored Interrupt Controller on Cortex-M that manages interrupt priority, enabling, pending state, and vectored dispatch to handler functions.
Related Links: Boot Flow on Cortex-M Exceptions Interruptions MPU Usage Patterns TrustZone-M</description></item></channel></rss>